PHOTOS MICROPROCESSOR INTEL XEON DUAL CORE SOCKET FOR
771
771
INTEL PENTIUM XEON 3200
WITH BUS 800 MHZ
PHOTO-771-SOCKET-LGA
Xeon (Socket 771) Intel Core
No.
pin, bus, multiplied and voltage
L1/L2/L3 Cache Socket
Transistors
Xeon 5030 MMX SSE SSE2 SSE3 (Dempsey) (dual area, Hyperthreading, EM64T, NX bit, VT) May 23, 2006
bolas2666MHz 771 (166x16) (Bus 64 quadpumped bits)? v
Socket 771 2x 16KB data (8-way) 2x 12k μoperaciones (8-way) 2x 2MB L2 unified or integrated (8-way) *?
230 GB cacheable millones0.065μm
ancho206mm ² area Xeon 5050 MMX SSE SSE2 SSE3 (Dempsey) (dual area, Hyperthreading, EM64T, NX bit, VT) May 23, 2006
bolas3000MHz 771 (166x18) (64-bit Bus quadpumped)? v
Socket 771 2x 16KB data (8-way) 2x 12k μoperaciones (8-way) 2x Integrated 2MB unified L2 (8-way) *?
230 GB cacheable millones0.065μm
ancho206mm ² area Xeon 5060 MMX SSE SSE2 SSE3 (Dempsey) (dual area, Hyperthreading, EM64T, NX bit, VT) May 23, 2006
bolas3200MHz 771 (266x12) (64-bit Bus quadpumped)? v
Socket 771 2x 16KB data (8-way) 2x 12k μoperaciones (8-way) 2x 2MB L2 unified or integrated (8-way) *?
230 GB cacheable millones0. 065μm ancho206mm ² area
Xeon 5063 MMX SSE SSE2 SSE3 (Dempsey) (dual area, Hyperthreading, EM64T, NX bit, VT) May 23, 2006
771 bolas3200MHz (266x12) (Bus 64-bit quadpumped)? v
Socket 771
2x 16KB data (8-way) 2x Μoperaciones 12k (8-way) 2x 2MB L2 unified or integrated (8-way) *?
230 GB cacheable millones0.065μm
ancho206mm ² area Xeon 5080 MMX SSE SSE2 SSE3 (Dempsey) (dual area, Hyperthreading, EM64T, NX bit, VT ) May 23, 2006
bolas3733MHz 771 (266x14) (64-bit Bus quadpumped)? v
Socket 771 2x 16KB data (8-way) 2x 12k μoperaciones (8-way) 2x 2MB L2 unified or integrated (8-way) *?
230 GB cacheable millones0.065μm ancho206mm ² area
Intel Core No. of pins, bus, and voltage multiplied
L1/L2/L3 Cache Socket
Transistors
Xeon 5110 MMX SSE SSE2 SSE3 (Woodcrest) (dual coe, EM64T) June 26, 2006
bolas1600MHz 771 (266x6) (64-bit Bus quadpumped)? V
Socket 771 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-area shared L2 (16 - way) * 64GB cacheable
? millones0.065μm wide? mm ² area
Xeon 5120 MMX SSE SSE2 SSE3 (Woodcrest) (dual coe, EM64T) June 26, 2006
bolas1866MHz 771 (266x7) (64-bit Bus quadpumped)? v
Socket 771 2x 32KB data ( 8-way) 2x 32KB instruction (8-way) 4MB on-area shared L2 (16-way) * 64GB cacheable
? millones0.065μm wide? mm ² area
Xeon 5130 MMX SSE SSE2 SSE3 (Woodcrest) (dual coe, EM64T) June 26, 2006
771 bolas2000MHz (333x6) (64-bit Bus quadpumped)? v
Socket 771 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-area shared L2 (16-way) * 64GB cacheable
? millones0.065μm wide? mm ² area
Xeon 5140 MMX SSE SSE2 SSE3 (Woodcrest) (dual coe, EM64T) June 26, 2006
bolas2333MHz 771 (333x7) (64-bit Bus quadpumped)? v
Socket 771 2x 32KB data ( 8-way) 2x 32KB instruction (8-way) 4MB on-area shared L2 (16-way) * 64GB cacheable
? millones0.065μm wide? mm ² area
LV Xeon 5148 MMX SSE SSE2 SSE3 (Woodcrest) (dual coe, EM64T) June 26, 2006
bolas2333MHz 771 (333x7) (Bus quadpumped 64-bit)? v
Socket 771 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-area shared L2 (16-way) * 64GB cacheable
? millones0.065μm wide? mm ² area
Xeon 5150 MMX SSE SSE2 SSE3 (Woodcrest) (dual coe, EM64T) June 26, 2006
bolas2666MHz 771 (333x8) (64-bit Bus quadpumped)? v
Socket 771 2x 32KB data ( 8-way) 2x 32KB instruction (8-way) 4MB on-area shared L2 (16-way) * 64GB cacheable
? millones0.065μm wide? mm ² area
Xeon 5160 MMX SSE SSE2 SSE3 (Woodcrest) (dual coe, EM64T) June 26, 2006
bolas3000MHz 771 (333x9) (64-bit Bus quadpumped)? v
Socket 771 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-area shared L2 (16-way) * 64GB cacheable
? millones0.065μm wide? mm ² area
SSE SSE2 SSE3 MMX Xeon (Woodcrest) (dual coe, EM64T) 2006? 771
balls? MHz (333X?) (64-bit Bus quadpumped)? V
Socket 771 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-area shared L2 (16-way) * 64GB cacheable
? millones0.065μm wide? mm ² area
?? MMX SSE SSE2 SSE3 (Tigerton) (quad core, EM64T) 2007? 771
balls? MHz ("X") (64-bit Bus quadpumped)? V
Socket 771 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2x? MB integrated L2 unified (?-Way) * 64GB cacheable
? million? microns wide? mm ² area
?? MMX SSE SSE2 SSE3 (Clovertown) (quad core, dual area, EM64T) 2007? 771
balls? MHz ("X") (64-bit Bus quadpumped)? V
Socket 771 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB shared L2 on-Zone (16-way ) * 64GB cacheable
? million? microns wide? mm ² area
?? MMX SSE SSE2 SSE3 (Whitefield) (multi coe, EM64T) 2008? 771
balls? MHz ("X") (64-bit Bus quadpumped)? V
Socket 771? X 32KB data (8-way)? X 32KB instruction (8-way)? MB shared L2 on-Area (?-Way) * 64GB cacheable
? millones0.065μm wide? mm ² area
?? MMX SSE SSE2 SSE3 (Dunnington) (multi coe, EM64T) 2008? 771
balls? MHz ("X") (64-bit Bus quadpumped)? V
Socket 771? X 32KB data (8-way)? X 32KB instruction (8-way)? MB shared L2 on-Zone (? -way) * 64GB cacheable
? million? microns wide? mm ² area
?? MMX SSE SSE2 SSE3 (Harpertown) (8 coe, quad area, EM64T) 2008? 771
balls? MHz ("X") (64-bit Bus quadpumped)? V
Socket 771 8x
32KB data (8-way) 32KB instruction 8x (8-way)? MB shared L2 on-Area (?-Way) * 64GB cacheable
? millones0.045μm wide? mm ² area
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